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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
May 2010
FODM8071 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Features
High noise immunity characterized by common mode
Description
The FODM8071 is a 3.3V/5V high-speed logic gate output Optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. It utilizes Fairchild's patented coplanar packaging technology, Optoplanar(R), and optimized IC design to achieve high noise immunity, characterized by high common mode rejection specifications. This high-speed logic gate output optocoupler, housed in a compact 5-Pin Mini-Flat package, consists of a highspeed AlGaAs LED at the input coupled to a CMOS detector IC at the output. The detector IC comprises an integrated photodiode, a high-speed transimpedance amplifier and a voltage comparator with an output driver. The CMOS technology coupled with a high efficiency LED achieves low power consumption as well as very high speed (55ns propagation delay, 20ns pulse width distortion).
rejection - 20kV/s minimum common mode rejection High speed - 20Mbit/sec date rate (NRZ) - 55ns max. propagation delay - 20ns max. pulse width distortion - 30ns max. propagation delay skew 3.3V and 5V CMOS compatibility Specifications guaranteed over 3V to 5.5V supply voltage and -40C to +110C temperature range
Safety and regulatory approvals
- UL1577, 3750 VACRMS for 1 min. - IEC60747-5-2 (pending)
Applications
Microprocessor system interface
- SPI, I2C Industrial fieldbus communications - DeviceNet, CAN, RS485 Programmable logic control Isolated data acquisition system Voltage level translator
Related Resources
www.fairchildsemi.com/products/opto/ www.fairchildsemi.com/pf/FO/FOD8001.html www.fairchildsemi.com/pf/FO/FOD0721.html
Functional Schematic Truth Table
ANODE 1 6 VDD
LED
Off On
Output
High Low
5 VO
CATHODE 3
4 GND
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
www.fairchildsemi.com
FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Pin Definitions
Number
1 3 4 5 6
Name
ANODE CATHODE GND VO VDD Anode Cathode Output Ground Output Voltage Output Supply Voltage
Function Description
Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin)
As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for "safe electrical insulation" only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Installation Classifications per DIN VDE 0110/1.89 Table 1 For rated main voltage < 150Vrms For rated main voltage < 300Vrms Climatic Classification Pollution Degree (DIN VDE 0110/1.89)
Min.
Typ.
I-IV I-III 40/110/21 2
Max.
Unit
CTI VPR
Comparative Tracking Index Input to Output Test Voltage, Method b, VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC Input to Output Test Voltage, Method a, VIORM x 1.5 = VPR, Type and Sample Test with tm = 60 sec, Partial Discharge < 5 pC Max Working Insulation Voltage Highest Allowable Over Voltage External Creepage External Clearance Insulation Thickness
175 1060 V
VPR
848
V
VIORM VIOTM
565 4000 5.0 5.0 0.5 150 109
Vpeak Vpeak mm mm mm C
TCase RIO
Safety Limit Values, Maximum Values allowed in the event of a failure, Case Temperature Insulation Resistance at TSTG,VIO = 500V
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Absolute Maximum Ratings (TA = 25C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. .
Symbol
TSTG TOPR TJ TSOL IF VR VDD VO IO PDI PDO
Parameter
Storage Temperature Operating Temperature Junction Temperature Lead Solder Temperature (Refer to Reflow Temperature Profile) Forward Current Reverse Voltage Supply Voltage Output Voltage Average Output Current Input Power Dissipation(1)(3) Dissipation(2)(3) Output Power
Value
-40 to +125 -40 to +110 -40 to +125 260 for 10sec 20 5 0 to 6.0 -0.5 to VDD+0.5 10 40 70
Units
C C C C mA V V V mA mW mW
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA VDD VFL IFH IOL
Parameter
Ambient Operating Temperature Supply Voltages(4) Logic Low Input Voltage Logic High Input Current Logic Low Output Current
Min.
-40 3.0 0 5 0
Max.
+110 5.5 0.8 16 7
Unit
C V V mA mA
Isolation Characteristics
(Apply over all recommended conditions, typical value is measured at TA = 25C)
Symbol
VISO RISO CISO
Parameter
Conditions
Min.
3750 1011
Typ.
Max.
Units
VacRMS
Input-Output Isolation Voltage freq = 60Hz, t = 1.0min, II-O 10A(5)(6) Isolation Resistance Isolation Capacitance VI-O = 500V(5) VI-O = 0V, freq = 1.0MHz(5)
0.2
pF
Notes: 1. Derate linearly from 95C at a rate of -1.4mW/C 2. Derate linearly from 100C at a rate of -3.47mW/C. 3. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to conditions outside these ratings. 4. 0.1F bypass capacitor must be connected between 4 and 6. 5. Device is considered a two terminal device: Pins 1, and 3 are shorted together and Pins 4, 5, and 6 are shorted together. 6. 3,750 VACRMS for 1 minute duration is equivalent to 4,500 VACRMS for 1 second duration.
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7 www.fairchildsemi.com 3
FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Electrical Characteristics (Apply over all recommended conditions) (TA = -40C to +110C, 3.0V VDD 5.5V), unless otherwise specified. Typical value is measured at TA = 25C and VDD = 3.3V.
Symbol
VF BVR IFHL IDDL IDDH VOH
Parameter
Forward Voltage Input Reverse Breakdown Voltage Threshold Input Current Logic Low Output Supply Current Logic High Output Supply Current Logic High Output Voltage
Test Conditions
IF = 10mA, Fig. 1 IR = 10A Fig. 2 VDD = 3.3V, IF = 10mA, Fig. 3, 5 VDD = 5.0V, IF = 10mA, Fig. 3, 6 VDD = 3.3V, IF = 0mA, Fig. 4 VDD = 5.0V, IF = 0mA, Fig. 4 VDD = 3.3V, IO = -20A, IF = 0mA VDD = 3.3V, IO = -4mA, IF = 0mA VDD = 5.0V, IO = -20A, IF = 0mA VDD = 5.0V, IO = -4mA, IF = 0mA
Min.
1.05 5
Typ.
1.35 15 2.8 3.3 4.0 3.3 4.0
Max.
1.8
Units
V V
INPUT CHARACTERISTICS
5 4.8 5.0 4.8 5.0
mA mA mA mA mA V V V V
OUTPUT CHARACTERISTICS
VDD - 0.1V VDD - 0.5V VDD - 0.1V VDD - 0.5V
3.3 3.1 5.0 4.9 0.0027 0.27 0.01 0.8
VOL
Logic Low Output Voltage
IO = 20A, IF = 10mA IO = 4mA, IF = 10mA
V V
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Switching Characteristics (Apply over all recommended conditions)
(TA = -40C to +110C, 3.0V VDD 5.5V, IF = 5mA), unless otherwise specified. Typical value is measured at TA = 25C and VDD = 3.3V
Symbol
Date Rate(7) tPW tPHL tPLH PWD tPSK tR tF | CMH |
Parameter
Pulse Width Propagation Delay Time to Logic Low Output Propagation Delay Time to Logic High Output Pulse Width Distortion, | tPHL - tPLH| Propagation Delay Skew Output Rise Time (10% to 90%) Output Fall Time (90% to 10%) Common Mode Transient Immunity at Output High Common Mode Transient Immunity at Output Low Output Dynamic Power Dissipation Capacitance(10)
Test Conditions
Min.
50
Typ.
Max.
20
Units
Mbps ns ns ns ns ns ns ns kV/s
CL = 15pF, Fig. 7, 8, 12 CL = 15pF, Fig. 7, 8, 12 CL = 15pF, Fig. 9, 10 CL = 15pF(8) Fig. 11, 12 Fig. 11, 12 IF = 0mA, VO > 0.8VDD, VCM = 1000V, TA = 25C, Fig. 13(9) IF = 5mA, VO < 0.8V, VCM = 1000V, TA = 25C, Fig. 13(9) 20
31 25 5.5
55 55 20 30
5.8 5.3 40
| CML |
20
40
kV/s
CPDO
4
pF
Notes: 7. Data rate is based on 10MHz, 50% NRZ pattern with a 50nsec minimum bit time. 8. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between any two units from the same manufacturing date code that are operated at same case temperature (5C), at same operating conditions, with equal loads (RL = 350 and CL = 15pF), and with an input rise time less than 5ns. 9. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm, to assure that the output will remain low. 10.Unloaded dynamic power dissipation is calculated as follows: CPD x VDD x f + IDD + VPD where f is switched time in MHz.
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Typical Performance Curves (Continued)
Fig. 1 Input Forward Current vs. Forward Voltage
100
IFHL - INPUT THRESHOLD CURRENT (mA) IF - INPUT FORWARD CURRENT (mA)
Fig. 2 Input Threshold Current vs. Ambient Temperature
4.0
10
3.5
VDD = 5.0V 3.0 VDD = 3.3V
1
0.1
2.5
TA = 110C 0.01 0.8 0.9
TA = 25C
TA = -40C 1.5 1.6
1.0 1.1 1.2 1.3 1.4 VF - FORWARD VOLTAGE (V)
2.0 -40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (C)
Fig 3. Logic Low Output Supply Current vs. Ambient Temperature
IDDH - LOGIC HIGH OUTPUT SUPPLY CURRENT (mA) IDDL - LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
Fig 4. Logic High Output Supply Current vs. Ambient Temperature
5.0 IF = 0mA 4.5 V DD = 5.0V
5.0 IF = 10mA 4.5 V DD = 5.0V 4.0 VDD = 3.3V 3.5
4.0
3.5
V
DD
= 3.3V
3.0
3.0
2.5
2.5
2.0 -40 -20 0 20 40 60 80 TA - AMBIENT TEMPERATURE (C) 100
2.0 -40 -20 0 20 40 60 80 TA - AMBIENT TEMPERATURE (C) 100
Fig. 5 Dynamic Logic Low Output Supply Current vs. Input Frequency (VDD = 3.3V)
5.0
IDDL - DYNAMIC LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
Fig. 6 Dynamic Logic Low Output Supply Current vs. Input Frequency (VDD = 5.0V)
5.5
IDDL - DYNAMIC LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
4.5
Frequency = 10MHz Duty Cycle = 50% IF = 10mA VDD = 3.3V
5.0
Frequency = 10MHz Duty Cycle = 50% IF = 10mA VDD = 5.0V
4.0 TA = 25C 3.5 TA = 110C 3.0 TA = -40C
4.5
T = 25C A TA = -40C
4.0
TA = 110C
3.5
2.5 0 2000 4000 6000 8000 f - INPUT FREQUENCY (kHz) 10000
3.0 0 2000 4000 6000 8000 10000 f - INPUT FREQUENCY (kHz)
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Typical Performance Curves (Continued)
Fig 7. Propagation Delay vs. Ambient Temperature
50 45
tP - PROPAGATION DELAY (ns)
Fig 8. Propagation Delay vs. Pulse Input Current
40 Frequency = 10MHz Duty Cycle = 50% TA = 25C
tP - PROPAGATION DELAY (ns)
Frequency = 10MHz Duty Cycle = 50% IF = 5mA
35
40 35 30 25 20 15 10 -40 -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) tPHL tPHL tPLH tPLH
30
tPLH tPLH
25 tPHL 20 tPHL
15 VDD = 3.3V VDD = 5.0V 10 4 6 8 10 12 IF - PULSE INPUT CURRENT (mA) 14 16 VDD = 3.3V V = 5.0V DD
Fig 9. Pulse Width Distortion vs. Ambient Temperature
(| tPHL - tPLH |) - PULSE WIDTH DISTORTION (ns)
Fig 10. Pulse Width Distortion vs Pulse Input Current
(| tPHL - tPLH |) - PULSE WIDTH DISTORTION (ns)
20
Frequency = 10MHz Duty Cycle = 50% IF = 5mA
15
Frequency = 10MHz Duty Cycle = 50% TA = 25C
15
12
10
VDD = 3.3V
9 VDD = 3.3V 6
5 VDD = 5.0V 0
3
VDD = 5.0V
-5 -40
0 -20 0 20 40 60 80 TA - AMBIENT TEMPERATURE (C) 100 4 6 8 10 12 14 IF - PULSE INPUT CURRENT (mA) 16
Fig 11. Rise and Fall Time vs. Ambient Temperature
10 Frequency = 10MHz Duty Cycle = 50% I = 5mA 9F
tR, tF - RISE, FALL TIME (ns)
8 tR
7
6 tF 5 tF tR
4
VDD = 3.3V VDD = 5.0V 20 40 60 80 100
3 -40
-20
0
TA - AMBIENT TEMPERATURE (C)
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Schematics
Pulse Gen. tf = tr = 5ns ZO = 50 VCC
0.1F
Input Monitoring Node RIN
VO Monitoring Node CL = 15pF
IF = 5mA 50% Input tPHL tf Output
90% 10%
tPLH tr
90% 50% 10% VOL
Figure 12. Test Circuit for Propagation Delay Time, Rise Time and Fall Time
IF VDD 0.1F Bypass A B VFF Output (Vo)
VCM Pulse Gen
VCM GND
VOH
Switching Pos. (A), IF = 0
CMH
0.8 x VDD
0.8V VOL
Switching Pos. (B), IF = 5mA
CML
Figure 13. Test Circuit for Instantaneous Common Mode Rejection Voltage
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Package Dimensions
Notes: 1. No standard applies to this package. 2. All dimensions are in millimeters. 3. Dimensions are exclusive of burrs, mold flash, and tie bar extrusion. 4. Drawings filesname and revision: MKT-MFP05A.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
www.fairchildsemi.com 9
FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Ordering Information
Option
No Suffix R2
Order Entry Identifier
FODM8071 FODM8071R2
Description
Mini-Flat 5-pin, shipped in tubes (100 units per tube) Mini-Flat 5-pin, tape and reel (2,500 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
1
M8071 V
3 4
2 6
X YY M
5
Definitions
1 2 3 4 5 6 Fairchild logo Device number IEC60747-5-2 (VDE marking) One digit year code, e.g., `9' Two digit work week ranging from `01' to `53' Assembly package code
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Tape and Reel Dimensions
K0 P0 P2 D0 E
t
A0 W1 B0 F
W
d
P
D1
2.54 Pitch Description Tape Width Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location Pocket Location Symbol W t P0 D0 E F P2 Pocket Pitch Pocket Dimension P A0 B0 K0 Pocket Hole Diameter Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Devices Per Reel Reel Diameter D1 W1 d Dimensions (mm) 12.00 +0.30 / -0.10 0.30 0.05 4.00 0.10 1.50 +0.10 / -0.0 1.75 0.10 5.50 0.10 2.00 0.10 8.00 0.10 4.40 0.10 7.30 0.10 2.30 0.10 1.50 Min. 9.20 0.065 0.010 10 Max. 2500 330mm (13")
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Reflow Profile
260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 TP
Max. Ramp-up Rate = 3C/S Max. Ramp-down Rate = 6C/S
tP Tsmax Preheat Area Tsmin ts tL
Temperature (C)
120 Time 25C to Peak
240
360
Time (seconds)
Profile Feature
Temperature Min. (Tsmin) Temperature Max. (Tsmax) Time (tS) from (Tsmin to Tsmax) Ramp-up Rate (tL to tP) Liquidous Temperature (TL) Time (tL) Maintained Above (TL) Peak Body Package Temperature Time (tP) within 5C of 260C Ramp-down Rate (TP to TL) Time 25C to Peak Temperature
Pb-Free Assembly Profile
150C 200C 60-120 seconds 3C/second max. 217C 60-150 seconds 260C +0C / -5C 30 seconds 6C/second max. 8 minutes max.
(c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.0.7
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FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
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ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handling and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary No Identification Needed Obsolete Product Status Formative / In Design First Production Full Production Not In Production Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I49
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